GitHub - ayberkozgur/jlcpcb-design-rules-stackups: JLCPCB design rules and stackups for Altium Designer
![KiCad STM32 + USB + Buck Converter PCB Design and JLCPCB Assembly (Update) - Phil's Lab #11 - YouTube KiCad STM32 + USB + Buck Converter PCB Design and JLCPCB Assembly (Update) - Phil's Lab #11 - YouTube](https://i.ytimg.com/vi/C7-8nUU6e3E/maxresdefault.jpg)
KiCad STM32 + USB + Buck Converter PCB Design and JLCPCB Assembly (Update) - Phil's Lab #11 - YouTube
![JLCPCB on Instagram: “Good news! High Frequency PCB is available on JLCPCB ! -Rogers PCBs start from $99.5, -PTFE PCBs from $50.5 Save you more than $100…” JLCPCB on Instagram: “Good news! High Frequency PCB is available on JLCPCB ! -Rogers PCBs start from $99.5, -PTFE PCBs from $50.5 Save you more than $100…”](https://scontent-atl3-1.cdninstagram.com/v/t51.2885-15/332347763_866987711072314_3930656341223096581_n.jpg?stp=dst-jpg_e15_fr_s1080x1080&_nc_ht=scontent-atl3-1.cdninstagram.com&_nc_cat=110&_nc_ohc=Gdkk7oefpgkAX_NAsc5&edm=APU89FABAAAA&ccb=7-5&oh=00_AfDInzdi35ttQVLGfvsOLEAnAMMwaWHUbpjPOBZ4zXgoxg&oe=6410CE5D&_nc_sid=86f79a)
JLCPCB on Instagram: “Good news! High Frequency PCB is available on JLCPCB ! -Rogers PCBs start from $99.5, -PTFE PCBs from $50.5 Save you more than $100…”
![My PCB fab (JLCPCB) filled or covered all my vias and through-holes despite me specifying not to. Is there a way I can fix this, aside from reordering? The through-hole for the My PCB fab (JLCPCB) filled or covered all my vias and through-holes despite me specifying not to. Is there a way I can fix this, aside from reordering? The through-hole for the](https://preview.redd.it/my-pcb-fab-jlcpcb-filled-or-covered-all-my-vias-and-through-v0-bwefi54fltv91.jpg?width=640&crop=smart&auto=webp&s=f2f59e2333e053d00180ac0d8e64274e052eb762)